Electronics and Electrical Communication Engg.

No Record Found.

Patent
• An ultra-low power high gain Transimpedance amplifier Perumalla S., Chowdhuri T. , Mandal P. By - (2023)
• Differential-to-single-endedcurrent mode Receiver and Differential hybrid mode Clock Distribution Network based on such Receiver Singh J., Mandal P. , Perumalla S. By - (2022)
• Impedimetric Oscillator Circuit Biswas S., Biswas K. , Mandal P. By - (2022)
• Low power current comparator Perumalla S., Mandal P. By - (2022)
Symposium
• Ultra-Low power current comparator Perumalla S., Mandal P. By IEEE International Symposium on Circuits and Systems - (2023)
• High Voltage Tolerant Output Buffer Design for Mixed Voltage Interfaces Mandal D., Mandal P. By IEEE International Symposium on Circuits and Systems (ISCAS) 4277-4280 (2005)
Journal
• A Hybrid, Fully-Integrated, Dual-output DC-DC Converter for Portable Electronics Dam S., Mandal P. By Transactions on Power Electronics 38 4360-4370 (2021)
• Hybrid Bidirectional Transceiver for Multipoint-to-Multipoint Signaling Across On-Chip Global Interconnects Chowdhury A. R., Wary N. , Mandal P. By Circuits, Devices Systems - (2020)
• Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across onchip global interconnects Wary N., Chowdhury A.R., Mandal P. By IET Circuits, Devices and Systems 14 780-787 (2020)
• Switched-Capacitor common-Mode feedback-Based fully di®erential operational ampli¯ers and its usage in implementation of integrators Basu J., Mandal P. By Journal of Circuits, Systems and Computers 29 - (2020)
• Delta-Sigma Modulator based Compact Signal Acquisition Front-end System Basu J., Mandal P. By Microelectronics Journal 98 - (2020)
• Fast locking, startup-circuit free, low area, 32-phase analog DLL Mondal S. A., Mandal P. , Rahaman H. By Integration, the VLSI Journal - (2019)
• Fast locking, startup-circuit free, low area, 32-phase analog DLL Mondal S.A., Mandal P., Rahaman H. By Integration 66 60-66 (2019)
• Modeling and sizing of non-linear CMOS analog circuits used in mixed signal systems Kundu S., Sarkar S., Mandal P., Islam A. By Analog Integrated Circuits and Signal Processing 99 95-109 (2019)
• An efficient method of Pareto-optimal front generation for analog circuits Kundu S., Mandal P. By Analog Integrated Circuits and Signal Processing 94 289-319 (2018)
• An Integrated DC-DC Boost Converter having Low Output Ripple Suitable for Analog Applications Dam S., Mandal P. By IEEE Transactions on Power Electronics 33 5108-5117 (2018)
• A review of micromachined thermal accelerometers Mukherjee R., Basu J. , Mandal P. , Guha P. K. By Journal of Micromechanics and Microengineering 27 - (2017)
• Current-mode full-duplex transceiver for lossy on-chip global interconnects Wary N., Mandal P. By IEEE Journal of Solid-State Circuits 52 2026-2037 (2017)
• Current-mode triline transceiver for coded differential signaling across on-chip global interconnects Wary N., Mandal P. By IEEE Transaction of VLSI 25 2575-2587 (2017)
• Sensitivity improvement of a dual axis thermal accelerometer with modified cavity structure Mukherjee R., Mandal P. , Guha P. K. By Microsystem Technologies 1-7 (2017)
• Spur Reduction in Frequency Synthesizer with an Array of Switched Capacitors Mandal D., Mandal P. , Bhattacharyya T. K. By Wiley International Journal of Circuit Theory and Applications 43 1815-1831 (2015)
• Prediction of reference spur in frequency synthesizers Debashis Mandal, Pradip Mandal, and Tarun Kanti Bhattacharyya By Circuits, Devices and Systems IET, Vol. 9, No. 2 131-139 (2015)
• Prediction of Reference Spur in Frequency Synthesizers Mandal D., Mandal P. , Bhattacharyya T. K. By IET Circuits, Devices and Systems 9 131-139 (2015)
• High-speed energy-efficient bi-directional transceiver for on-chip global interconnects Wary N., Mandal P. By IET Circuits, Devices and Systems 9 319-327 (2015)
• Sensitivity improvement using optimized heater design for dual axis thermal accelerometers R. Mukherjee, P.K. Guha and P. Mandal By Microsystem Technologies Springer, DOI-10.1007/s00542-0 - (2015)
• A low impedance receiver for power efficient current mode signaling across on-chip global interconnects Nijwm Wary and P. Mandal By International Journal of Electronics and Communications Elsevier, Volume 68, No.10 969-975 (2014)
• Spur reducing architecture of frequency synthesizer using switched capacitors Mandal D., Mandal P. , Bhattacharyya T. K. By IET Circuits, Devices and Systems 8 237-245 (2014)
• A Pseudo Cross-Coupled Switch-Capacitor based DCDC Boost Converter for High Efficiency and High Power-Density Tamal Das, Sankalan Prasad, Samiran Dam and Pradip Mandal By Transactions on Power Electronics IEEE, No. 11, Vol. 29, 5961-5974 (2014)
• A Spur Reducing Architecture of Frequency Synthesizer using Switched Capacitors Debashis Mandal, Pradip Mandal, and Tarun Kanti Bhattacharyya By Circuits, Devices Systems IET, No. 4, Vol. 8, 237-245 (2014)
• ISGP: Iterative Sequential Geometric Programming for Precise and Robust Analog Circuit Sizing Sudip Kundu, and Pradip Mandal By Integration, the VLSI Journal Elsevier, No. 4, Vol. 47, 510-531 (2014)
• Modeling and Design of CMOS Analog Circuits through Hierarchical Abstraction Samiran Dam and P. Mandal By Integration, the VLSI Journal Elsevier, No. 4, Vol. 46, 449-462 (2013)
• Active Terminated Transmitter and Receiver Circuits for High-Speed Low-Swing Duobinary Signaling Vijaya Sankara Rao P. and P. Mandal By International Journal of Circuit Theory and Applications Wiley, No. 4, Vol. 40, 355-376 (2012)
• A High Performance Switched Capacitor Based DC-DC Buck Converter Suitable for Embedded Power Management Applications Maiti B., Mandal P. By IEEE Transactions on VLSI 20 1880-1885 (2012)
• A Low Power 5Gb/s Current-Mode LVDS Output Driver with Active Termination Vijaya Sankara Rao P., Nachiket Desai and P. Mandal By Circuits, Systems and Signal Processing Springer, No. 1, Vol. 31, 31-49 (2012)
• Design and Implementation of an Area and Power Efficient Switched-Capacitor Based Embedded DC-DC Converter Biswajit Maity, Soumya Gangula and P. Mandal By Journal of Low Power Electronics American Scientific Publishers, No. 2, Vol. 8, 207-222 (2012)
• Improvement of Performance of Dynamically Reconfigurable Switched Capacitor Based Non-Overlap Rotational Time Interleaved Embedded DC-DC Converter Kaushik Bhattacharyya and P. Mandal By Journal of Low Power Electronics American Scientific Publishers, No. 2, Vol. 8, 223-234 (2012)
• Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios Kaushik Bhattacharyya, P. V. Ratna Kumar and P. Mandal By Journal of Circuits, Systems, and Computers World Scientific, Vol.21, No. 1 - (2012)
• Active Terminated Current-Mode Pre-emphasis Transmitter for PCI Express Standard Vijaya Sankara Rao P, Debashis Banerjee and P. Mandal By International Journal of Electronics and Communication Elsevier, No. 7, Vol. 65, - (2011)
• A Dynamically Reconfigurable NRTI Switched-Capacitor based Hybrid DC-DC Converter suitable for Embedded Applications Kaushik Bhattacharyya and P. Mandal By Microelectronics Journal Elsevier, No. 2, Vol. 42, 422-431 (2011)
• A new current-mode receiver for high-speed electrical/optical link Rao P. V. S., Mandal P. By International Journal of Electronics and Communication Elsevier, No. 2, Vol. 65, 107-116 (2011)
• Half-Rate Duobinary Transmitter Architecture for Chip-to-Chip Interconnect Applications Mrigank Sharad, Vijaya Sankara Rao P. and P. Mandal By Analog Integrated Circuits and Signal Processing Springer, No. 3, Vol. 68, 361-377 (2011)
• Current-Mode Full-Duplex (CMFD) Signaling for High Speed Chip-to-Chip Interconnect Vijaya Sankara Rao P. and P. Mandal By Microelectronics Journal, Elsevier, Vol. 42, No. 7, 957-965 (2011)
• Current-Mode Analog Interface for High-Speed Low-Current Differential Signaling Vijaya Sankara Rao P. and P. Mandal By International Journal of Electronics Taylor & Francis, No.9, Vol. 97. 1007-1020 (2010)
• Switched-Capacitor Based Buck Converter Design Using Current Limiter Tamal Das and P. Mandal By Journal of Low Power Electronics American Scientific Publisher, No. 3, Vol. 5 - (2009)
• Design of a low power voltage regulator for high dynamic range of load current Ashis Maiti, R. Raghavendra and P. Mandal By International Journal of Electronics Taylor & Francis, No.8, Vol. 94 743-757 (2007)
• CMOS Op-Amp Sizing Using a Geometric Programming Formulation P. Mandal and V. Visvanathan By Transactions on Computer Aided Design of Integrated Circuits and Systems IEEE, No. 1, Vol 20 22-38 (2001)
• Self Biasing of High Performance Folded Cascode CMOS Op-Amp P. Mandal and V. Visvanathan By International Journal of Electronics Taylor & Francis, No.9, Vol. 87 795- 808 (2000)
• Active Biasing of Multi Stage CMOS Op-Amps P. Mandal and V. Visvanathan By International Journal of Electronics Taylor & Francis, No.8, Vol. 86 933-946 (1999)
Conferences
• Design of a Wideband Differential LNA Based in CMOS 180 nm Technology Joshi K., Mandal M.K., Mandal P. By 2021 IEEE MTT-S International Microwave and RF Conference, IMARC 2021 - (2021)
• A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE Chowdhury A.R., Wary N., Mandal P. By Midwest Symposium on Circuits and Systems 2019-August 790-793 (2019)
• Energy efficient bidirectional equalized transceiver with PVT insensitive active termination Chowdhury A.R., Wary N., Mandal P. By Proceedings - 32nd International Conference on VLSI Design, VLSID 2019 - Held concurrently with 18th International Conference on Embedded Systems, ES 2019 25-30 (2019)
• Spur suppression in frequency synthesizer using switched capacitor array Mandal D., Mandal P. , Bhattacharyya T. K. By IEEE International System-on-Chip (SoC) Design Conference 100-103 (2012)

Principal Investigator

• Equalizer for Lite Link
• DESIGN OF METHODOLOGY FOR ROBUST ANALOGUE BUILDING BLOCKS
• DESIGN AUTOMATION OF ANALOG VLSI
• I/O Buffer design review
• Design of Switch Capacitor based Embedded DC-DC Buck Converter
• Design Methodology for Analogue VLSI Circuits
• Design & Implementation of a 250 MSPS, 8 bit ADC in Sub-Micron Technology for Space Application

Co-Principal Investigator

• Development and Demonstration of Integrated Instrumentation System for Quantitative Detection of Water Contaminants with Information Database for Surveillance of Waterborne Diseases
• Development and Demonstration of Integrated Instrumentation System for Quantitative Detection of Water Contaminants with Information Database for Surveillance of Waterborne Diseases